Thinness and lightness of semiconductors tend to be continuously demanded in a semiconductor market, and since it is desired by consumers that products consuming a low amount of battery power and having a smaller size be supplied at low cost, semiconductor manufacturers have attempted to continuously reduce sizes of chips and packages. To this end, fan-out package technology, a manner of performing signal connection using a redistribution layer (RDL) when packaging a semiconductor chip, has been actively developed, and technology of applying such a fan-out package to a package-on-package structure has been actively developed. However, in accordance with thinning of a lower fan-out package applied to a package-on-package, a defect of solder joints due to warpage of the lower package occurring at the time of stacking an upper package on the lower package has increased.